As described in the Society for Motion Picture and Television Engineers (SMPTE) Standard 12M: “Time Code and Control for Television, Audio, and Film”, a Linear Time Code (LTC) frame serves as a mechanism for communicating digital time-stamp and control code information for use in television, film, and accompanying audio systems operating at 30, 29.97, 25, and 24 frames/second. Each LTC code frame contains 80 bits numbered 0 through 79 that are generated serially beginning with bit 0 for a “forward” time code and bit 79 for a “reverse” time code. Each successive LTC frame begins where the previous frame left off. Each 80-bit LTC frame comprises a 64-bit LTC data word (payload) and a 16-bit static synchronization sequence. Each LTC frame contains a unique time stamp for an associated video or film frame that include four binary-coded-decimal (BCD) fields representing hours, minutes, seconds, and frames. The nominal bit rate for a LTC frame is Fs=80*Fr, where Fr is the associated nominal video or film frame rate. In addition to the BCD-formatted time stamp, 32 bits remain available within a LTC data word for user-defined purposes. FIG. 1 depicts an exemplary LTC frame.
The sixteen bits in the synchronization sequence within the LTC frame enable LTC receiving equipment to accurately delineate LTC frames and identify bit positions within each frame. The LTC frame synchronization pattern is unique in that the same bit combination cannot be generated by any combination of valid data values in the remainder of the frame. The twelve central bits of the 16-bit synchronization pattern are all logic one. The leading two bits are both zero while the trailing two bits are logic zero followed by logic one. The different leading and trailing bit pair patterns allow an LTC receiver to determine the direction (forward/reverse) of the LTC frame.
The 80-bit NRZ binary data comprising an LTC frame is bi-phase-mark encoded according to the following rules specified in Standard 12M:                A transition occurs at each bit symbol boundary regardless of the bit value;        A logic one is represented by an additional transition occurring at the bit symbol midpoint; and        A logic zero is represented by having no additional transitions within the bit symbol.The bi-phase-mark encoded signal has no dc component, is amplitude and polarity insensitive, and contains significant spectral energy at the bit symbol rate. Therefore, a LTC frame qualifies as a self-clocking data stream because a Phase Lock Loop (PILL) can lock to this stream and extract the bit-rate clock. The LTC frame can be recorded on an audio linear tape track.        
Heretofore, LTC receivers have used an analog PLL. As discussed above, the LTC Frame utilizes a synchronization technique that makes use of a transition at the bit symbol boundary for both logic zero and logic one binary symbol values, plus an additional mid-symbol transition for logic one bit symbols. Because the frame has high spectral energy at the symbol rate, the PLL can frequency lock its local oscillator to the symbol rate of the bi-phase-mark encoded LTC frame. A “data-slicing” circuit operating at a multiple of the recovered symbol clock can more than recover the 64 payload bits per frame of time code data.
Present day LTC receivers that utilize an analog PLL suffer from the disadvantage that the PLL clock recovery circuit has to work over a symbol rate of x/30 to 80×the nominal symbol rate of 2400 bits/sec for a 525 line/60 field video format (80 bits/frame×30 frames/sec). Designing a voltage-controlled oscillator (VCO) that works over this wide an input reference range often proves difficult. Moreover, analog circuitry typically requires calibration to achieve repeatable results.